"An empirical comparison of the RISC-V and AArch64 instruction sets."

Just glancing through the paper (which is open access), it looks like RISC-V is competitive with ARM. They do 5 benchmarks, and for each one, it looks like they do a pretty sophisticated analysis, looking at path length, cycles per instruction, and length of the critical path. For most metrics, the ARM and RISC-V results are very close. When they're different the ARM processor usually does slightly better but there are actually some metrics where RISC-V does better.

"Our results show that the RISC-V ISA is not disadvantaged compared to the Arm AArch64 ISA in terms of potential performance for codes produced by today's compilers for HPC style workloads."

"With instruction counts largely within 10% of each other, and equivalent parallelism available, in most cases this leads to estimated equivalent run times for these architectures. Deeper analysis of STREAM shows that, with Arm's more powerful load and store instructions, path lengths have the potential to be much shorter than those presented. But with so many options available, the optimal solution is harder for compilers to find. In addition, with the inclusion of comparison instructions, AArch64 binaries require additional instructions when conditionally branching compared to RISC-V, potentially leading to up to 15% longer paths with all other instructions equivalent."

An empirical comparison of the RISC-V and AArch64 instruction sets

#solidstatelife #riscv